![]() 1, of logic circuit test equipment to which the multi-clock generator of the present invention is applied. BRIEF DESCRIPTION OF THE DRAWINGSĪ description will be given, with reference to FIG. In this case, the first and second oscillators are arranged so that they oscillate at the same frequency which can be set from the outside namely, the same set frequency data can be used for oscillation of these oscillators. In this way, multi-clock pulses of the same number as the preset number of clocks are produced upon each occurrence of the trigger pulse. The number of multi-clock pulses is counted by a clock counter, and when it is detected by stop detecting means that the clock counter has counted to a preset number of multi-clock pulses, the first and second oscillators are stopped from oscillation. The oscillation outputs of the first and second oscillators are applied to a flip-flop to control it, producing multi-clock pulses each having a leading edge determined by the oscillation output of one of the oscillators and a trailing edge determined by the oscillation output of the other. a predetermined numberĪccording to the present invention, when a trigger clock is input, its leading and trailing edges are detected, and a first oscillator starts oscillation at the leading edge detected timing and a second oscillator starts oscillation at the same oscillation frequency as the first oscillator at the trailing edge detected timing. H03K3/78- Generating a single train of pulses having a predetermined pattern, e.g.H03K3/00- Circuits for generating electric pulses Monostable, bistable or multistable circuits.G01R31/31922- Timing generation or clock distribution. ![]() G01R31/31917- Stimuli generation or application of test patterns to the device under test.G01R31/317- Testing of digital circuits.G01R31/28- Testing of electronic circuits, e.g.G01R31/00- Arrangements for testing electric properties Arrangements for locating electric faults Arrangements for electrical testing characterised by what is being tested not provided for elsewhere.G01R- MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES.238000006011 modification reaction Methods 0.000 description 1.238000004519 manufacturing process Methods 0.000 description 1.230000000875 corresponding Effects 0.000 claims description 12.Assignors: IDE, KEIICHIRO Application granted granted Critical Publication of US4623845A publication Critical patent/US4623845A/en Anticipated expiration legal-status Critical Status Expired - Fee Related legal-status Critical Current Links Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.) Filing date Publication date Priority to JP59027644A priority Critical patent/JPH0464431B2/ja Priority to JP59-27644 priority Application filed by Takeda Riken Industries Co Ltd filed Critical Takeda Riken Industries Co Ltd Assigned to TAKEDA RIKEN KOGYO KABUSHIKIKAISHA, A CORP OF JAPAN reassignment TAKEDA RIKEN KOGYO KABUSHIKIKAISHA, A CORP OF JAPAN ASSIGNMENT OF ASSIGNORS INTEREST. Original Assignee Takeda Riken Industries Co Ltd Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.) ![]() Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.) Expired - Fee Related Application number US06/700,905 Inventor Keiichiro Ide Current Assignee (The listed assignees may be inaccurate. Google Patents US4623845A - Multi-clock generatorĭownload PDF Info Publication number US4623845A US4623845A US06/700,905 US70090585A US4623845A US 4623845 A US4623845 A US 4623845A US 70090585 A US70090585 A US 70090585A US 4623845 A US4623845 A US 4623845A Authority US United States Prior art keywords clock output period counter pulses Prior art date Legal status (The legal status is an assumption and is not a legal conclusion.
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